M xyw-vscode/syntaxes/xyw.tmLanguage.json → xyw-vscode/syntaxes/xyw.tmLanguage.json

@@ -110,9 +110,9 @@ "instructions": {
             "comment": "All 32 instructions from xyw_instructions with optional modifiers",
             "patterns": [
                 {
-                    "comment": "BRK and RTS have no modifiers",
+                    "comment": "RTS has no modifiers",
                     "name": "variable.other.instruction.xyw",
-                    "match": "\\b(BRK|RTS)\\b"
+                    "match": "\\b(RTS)\\b"
                 },
                 {
                     "comment": "OVR and ROT only support w modifier",
@@ -140,7 +140,7 @@ }
                 },
                 {
                     "comment": "All other instructions with optional xyw modifiers",
-                    "match": "\\b(PSH|POP|CLR|LDB|LDW|STB|STW|INC|DEC|SHL|SHR|ADD|SUB|MUL|DIV|EQU|NEQ|GTH|LTH|AND|IOR|XOR|NOT|SWP|DUP)([xyw]*)\\b",
+                    "match": "\\b(PSH|POP|CLR|SET|LDB|LDW|STB|STW|INC|DEC|SHL|SHR|ADD|SUB|MUL|DIV|EQU|NEQ|GTH|LTH|AND|IOR|XOR|NOT|SWP|DUP)([xyw]*)\\b",
                     "captures": {
                         "1": {
                             "name": "variable.other.instruction.xyw"

M xyw.c → xyw.c

@@ -9,7 +9,7 @@ int xyw_argc = 0;
 
 // Instruction mnemonics definition
 const char xyw_instructions[][4] = {
-    "BRK", "PSH", "POP", "CLR",
+    "CLR", "SET", "PSH", "POP",
     "LDB", "LDW", "STB", "STW",
     "INC", "DEC", "SHL", "SHR",
     "ADD", "SUB", "MUL", "DIV",

M xyw.vim → xyw.vim

@@ -33,8 +33,8 @@ 
 " Device identifiers (system.*, terminal.*, file.*, clock.*, beeper.*)
 syntax match xywDeviceId "\<\(system\|terminal\|file\|clock\|beeper\)\.[a-zA-Z0-9_.\-]*\>"
 
-" Instructions - BRK and RTS have no modifiers
-syntax match xywInstruction "\<\(BRK\|RTS\)\>"
+" Instructions - RTS has no modifiers
+syntax match xywInstruction "\<\(RTS\)\>"
 
 " Instructions - OVR and ROT only support w modifier
 syntax match xywInstruction "\<\(OVR\|ROT\)w\?\>"
@@ -43,7 +43,7 @@ " Instructions - JMP, JCN, JSR support x or y (not both) and w
 syntax match xywInstruction "\<\(JMP\|JCN\|JSR\)\([xy]\?w\?\)\>"
 
 " Instructions - All other instructions with optional xyw modifiers
-syntax match xywInstruction "\<\(PSH\|POP\|CLR\|LDB\|LDW\|STB\|STW\|INC\|DEC\|SHL\|SHR\|ADD\|SUB\|MUL\|DIV\|EQU\|NEQ\|GTH\|LTH\|AND\|IOR\|XOR\|NOT\|SWP\|DUP\)\([xyw]*\)\>"
+syntax match xywInstruction "\<\(PSH\|POP\|CLR\|SET\|LDB\|LDW\|STB\|STW\|INC\|DEC\|SHL\|SHR\|ADD\|SUB\|MUL\|DIV\|EQU\|NEQ\|GTH\|LTH\|AND\|IOR\|XOR\|NOT\|SWP\|DUP\)\([xyw]*\)\>"
 
 " Define highlight groups
 highlight default link xywComment Comment

M xywrun.c → xywrun.c

@@ -385,13 +385,15 @@ XYW_DBG(" -- PC: %04X -> %02X (%s) [U:%02X|S:%02X|X:%02X|Y:%02X|XW:%04X|YW:%04X]\n", *pc, xyw_memory[*pc], xyw_instructions[xyw_memory[*pc] & 0x1F], *u, *s, *x, *y, *xw, *yw);
         switch (xyw_memory[*pc])
         {
             // clang-format off
-            /* BRK */ case 0x00: return 0; // Simply return from evaluation
-            /* PSH */ OPC_SR1(0x01, , if (rx||ry) { PUSH(ARG); } else { (*pc)++; PUSH(READ(*pc)); if (w) { (*pc)++; } })
-            /* PSH */ OPC_SR1r(0x01, PUSH(a); PUSH(b); )
-            /* POP */ OPC_SR1(0x02, , if (rx||ry) { SET(POP()); } else { POP(); } );
-            /* POP */ OPC_SR1r(0x02, if (w) { xyw_word val = us_popw(); *xw = val; *yw = val; } else { xyw_byte val = us_pop(); *x = val; *y = val; } );
-            /* CLR */ OPC_SR1(0x03, , SET(0));
-            /* CLR */ OPC_SR1r(0x03, if (w) { *xw = 0; *yw = 0; } else { *x = 0; *y = 0; } );
+            /* CLR */ OPC_SR1(0x00, , SET(0));
+            /* CLR */ OPC_SR1r(0x00, if (w) { *xw = 0; *yw = 0; } else { *x = 0; *y = 0; } );
+            /* SET */ OPC_SR1(0x01, , if (w) { SET(0xFFFF) } else { SET(0xFF) });
+            /* SET */ OPC_SR1r(0x01, if (w) { *xw = 0xFFFF; *yw = 0xFFFF; } else { *x = 0xFF; *y = 0xFF; } );
+            /* PSH */ OPC_SR1(0x02, , if (rx||ry) { PUSH(ARG); } else { (*pc)++; PUSH(READ(*pc)); if (w) { (*pc)++; } })
+            /* PSH */ OPC_SR1r(0x02, PUSH(a); PUSH(b); )
+            /* POP */ OPC_SR1(0x03, , if (rx||ry) { SET(POP()); } else { POP(); } );
+            /* POP */ OPC_SR1r(0x03, if (w) { xyw_word val = us_popw(); *xw = val; *yw = val; } else { xyw_byte val = us_pop(); *x = val; *y = val; } );
+            
             /* LDB */ OPC_SR1(0x04, , us_push(readb(ADDR(ARG))));
             /* LDB */ OPC_SR1r(0x04, us_push(readb(ADDR(ARGX))); us_push(readb(ADDR(ARGY))); );
             /* LDW */ OPC_SR1(0x05, , us_pushw(readw(ADDR(ARG)) ));